Skip to content
e2eHiringFor employers
Log inSign up
← Back to jobs

GoogleEmployer profile

SoC RTL Design Engineer

Location not specified · 3–83.3 yrs

Experience
3–83.3 yrs
Salary
Not disclosed
Location
Location not specified
Work mode
Not specified
Job type
Full-time
Apply by
Closing date not listed
Posted
12 Jan 36

About this role

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
  • 3 years of experience in RTL coding using Verilog or Systemverilog language.
  • Experience in STA closure, DV test-plan review, and coverage analysis of the sub-system and chip level verification.

Preferred qualifications:

  • Master's degree in Electrical Engineering, Computer Science, or a related field.
  • Knowledge in one or more of these areas: Process Cores, Interconnects, Debug and Trace, Security, Interrupts, Clocks/Reset, Power/Voltage Domains, Pin-muxing.

About The Job

Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology.

Responsibilities

  • Define the microarchitecture of Subsystems or SoCs and work with the team to deliver a quality, schedule compliant design.
  • Perform RTL coding for Subsystems/SoC integration, function/performance simulation debug, Lint/CDC/FV/UPF checks.
  • Work closely with the cross-functional team of Architecture, Verification, Design for Test, Physical Design, and Software teams to make design decisions.
  • Define the block level design document such as interface protocol, block diagram, transaction flow, pipeline, etc.


Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .

Skills

Other Information Technology and Engineering
SoC RTL Design EngineerNot disclosed