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Senior Silicon Physical Design Engineer

Location not specified · 5–83.3 yrs

Experience
5–83.3 yrs
Salary
Not disclosed
Location
Location not specified
Work mode
Not specified
Job type
Full-time
Apply by
Closing date not listed
Posted
12 Feb 36

About this role

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 5 years of experience with physical design flow such as constraints, synthesis, floor planning, place and route, clock tree synthesis (CTS), or physical verification.
  • Experience with low-power design techniques, such as power gating, clock gating, or voltage scaling.
  • Experience with hardware description languages (RTL) such as verilog and systemverilog.

Preferred qualifications:

  • Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science.
  • Experience with scripting languages such as Perl, Python, or Tcl.
  • Knowledge of Circuit design, device physics, and submicron technology.

About The Job

Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology.

Responsibilities

  • Develop all aspects of ASIC implementation for high Performance, Power, Area (PPA) designs.
  • Manage block and full-chip level physical implementation and Quality of Results (e.g., power, timing, area).


Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .

Skills

Information Technology and Engineering
Senior Silicon Physical Design EngineerNot disclosed