Intel CorporationEmployer profile
Analog Design Engineer (High speed IO design)
Location not specified · 3–15 yrs
Experience- 3–15 yrs
Salary- Not disclosed
Location- Location not specified
- Work mode
- Not specified
- Job type
- Full-time
Apply by- Closing date not listed
- Posted
- 12 Apr 36
About this role
Job DescriptionJob Description
Responsibilities
You will be joining an expanding High speed IO team involved in design and development on cutting-edge Intel and external foundry process development nodes. Your responsibilities will include but not be limited to:
The candidate Should have experience of designing/architecting high speed IO circuits such as transmitter, receiver, clocking, PLL, DLL, Tx, Rx, DDR, SerDes, LPDDR, DDR, HBM) etc. Strong fundamentals of CMOS design, passive RC circuits, high circuit design concept are a must for this role. The various task involves, circuit design, validation, layout review, mixed signal validation, and reliability validation. Exposure to High speed digital circuit design and analysis with timing and flow closure. Digitally assisted analog circuit and techniques. The candidate will be responsible for the High speed, low power, and reliable analog and digital circuits for various areas of High speed IO design .Good knowledge of control systems, band gaps, bias, op-amps, LDOs, feedback and compensation techniques.
Candidate needs to work with post si and SoC team to debug the issue on pre/post si. Need to have strong written/verbal communication to influence stake-holder. Candidate is expected to drive technical decision to achieve KPI/schedule
Qualifications
Job Qualifications
Candidate should possess at least a Master of Science degree in Electrical Engineering or equivalent.
Strong academic background required in CMOS semiconductor device physics and silicon processing.
Relevant coursework in CMOS digital, analog, and I/O circuit design Knowledge of transistor-level circuit simulation tools such as SPICE
The Following Preferred Qualifications Would Be An Added Advantage
3-15 years of experience in Circuit Design.
Familiarity with CMOS transistor and semiconductor device layout methods.
Experience using custom design environments such as Cadence design automation tools (ADS, Analog Artist, or Virtuoso) Knowledge of DRC, LVS, and post-layout extraction tools.
Inside this Business Group
IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel’s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at https://jobs.intel.com/ and not fall prey to unscrupulous elements.
Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
In certain circumstances the work model may change to accommodate business needs.